520 MHz divide by 64/65 Prescaler

SP8718 520 MHz Prescaler PLESSEY


Away from the division ratio the SP8718 is identical to the SP8719


  1. The inputs are biased internally and coupled to a signal source with suitable capacitors.
  2. If no signal is present the devices will self-oscillate. If this is undesirable, it may be prevented by connecting a 15k resistor from one input to pin 4 (ground). This will reduce the sensitivity.
  3. The circuits will operate down to DC, but slew rate must be better than 100V/µs.
  4. The output stage is of an unusual design and is intended to interface with CMOS. External pull-up resistors or circuits must not be used.
  5. This device is NOT suitable for driving TTL or its derivatives.